The most important question is whether #Intel #CoyoteCove / #PantherCove inherited this ZMM-issue from the earlier *Coves; if not, that represents a significant advantage, since, as we know, "the least interesting part of #AVX512 is the 512-bit vector width.":
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Given the unique CPUID family (400Fxx), the distinct #PantherCove codename, and #Intel's insistence on distinguishing between server and client cores, I would be surprised if #DiamondRapids did not feature 8x256-bit FPU ports for #AMX, additional FMA and permutation EUs
