@jissonews.bsky.social2027年1月22日(金)13:00〜17:30に、アジア半導体機構 #ASTSA が「デバイス実装研究会」を開催。九州経済調査協会などが共催。講演5件。超集積実装、大型ガラスパネル基板、新開発の仮固定材、リンテックの新材料と糸島で始動する研究所、超厚膜熱酸化膜。福岡市中央区・ホテルニューオータニ博多およびオンライン(Zoom)にて。詳細は https://x.gd/txN0T に。PDF版案内は https://x.gd/3g9xk に。
#Seminar #AdvancedPackaging #GlassSubstrate #Kyushu
@edsonbellido.bsky.social4/4 Source: 2.5D vs 3D Packaging: What Is the Difference? by AnySilicon. Full article: https://anysilicon.com/2-5d-vs-3d-packaging-what-is-the-difference/ #Semiconductors #AdvancedPackaging
@edsonbellido.bsky.social1/4 🧵 Every AI package hides a fork: dies beside each other on an interposer, or stacked vertically through hybrid bonding. 2.5D still carries AI and HPC volume, but 3D density keeps climbing. In 2026 the answer is increasingly both. #AdvancedPackaging #Semiconductors
![SemiRecap Infographic [HARDWARE_DEEP_DIVE]: 2.5D vs 3D Packaging: Key Differences Explained. A clean 2.5D vector cartoon tech illustration on solid pure white background (#FFFFFF). Left panel shows a 2.5D package: a Deep Maroon (#450d16) compute die and two HBM stacks placed side by side on a labeled 'SILICON INTERPOSER' with cyan bus traces fanning between the dies, all seated on a 'PACKAGE SUBSTRATE' with warm gold pins. Right panel shows a 3D stack: two Deep Maroon dies vertically bonded, with a cutaway revealing gold 'TSV' pillars and a 'HYBRID BOND <10µm' interface line, labeled 'STACKED LOGIC' and 'BASE DIE'. A center arrow labeled '3.5D' merges both panels into one package combining vertically stacked memory above side-by-side chiplets on the interposer. Minimal clean structural labels identify each specific component.](https://cdn.bsky.app/img/feed_fullsize/plain/did:plc:nxdiuv7626cjwxguzjlh4o3b/bafkreigumitehah3tmmumhcdiuwqih4nqkvg6lf6b3wa67obqnbcdwec6m@png)
@iwpost.bsky.socialThe Frontier Express: when Samsung gets money#advancedpackaging #Block2 #logicchips #memorychips #SamsungElectronics #Technology
@jissonews.bsky.social9月29日(火)に、Global Electronics Association（旧IPC）がドイツの研究機関 Fraunhofer Group for Microelectronics とMoU（覚書）を締結。 目的は、先端パッケージング技術を産業として普及させること。対象は、EU Chips Act（欧州半導体法）に基づく先端パッケージング・異種統合の欧州パイロットライン #APECS で、Fraunhofer-Gesellschaftが取りまとめる。→
#AdvancedPackaging #Chiplet #Fraunhofer
@edsonbellido.bsky.social4/4 Source: Semiconductor Digest — https://www.semiconductor-digest.com/globalfoundries-tsmc-agreement-for-u-s-ai-chip-packaging-components/ #Semiconductors #AdvancedPackaging #CoWoS
@edsonbellido.bsky.social2/4 GF adds fabrication capacity at Malta to supply interposers with embedded deep trench capacitor components. Volume production is expected to begin ramping in H1 2028. Initial term: five years, with a framework for capacity expansion. #AdvancedPackaging #Chips
@edsonbellido.bsky.social4/4 📄 Source: THE ELEC, October 1, 2026. The EPIC Center is in final preparations, with R&D equipment moving into clean rooms and an unveiling ceremony set for October 12, 2026. #Chips #AdvancedPackaging
@edsonbellido.bsky.social1/4 🧩 Advanced packaging is no longer simple back end assembly. Applied Materials and Besi are expanding their collaboration at the $5B EPIC Center in Silicon Valley, jointly developing D2W hybrid bonding, TCB, DoW, DoD, DoP and CPO. #Semiconductors #AdvancedPackaging
![SemiRecap Infographic [STRATEGIC_PARTNERSHIP_MOU]: Applied Materials and Besi Deepen Hybrid Bonding Alliance. A 2.5D vector cartoon illustration on solid white background (#FFFFFF) showing two large modular equipment blocks docking inside an EPIC Center cleanroom: a Deep Maroon (#450d16) Applied Materials process module labeled with etch, deposition and metrology icons, and a Besi assembly module with die placement arms. Their interface is a glowing cyan hybrid bond chamber where a die is bonded directly onto a wafer with copper pads, no solder bumps shown. A gold process flow arrow runs from WLP to PLP panel stages, with a small CPO optical interconnect chip glowing at the end.](https://cdn.bsky.app/img/feed_fullsize/plain/did:plc:nxdiuv7626cjwxguzjlh4o3b/bafkreiea5hf6jrfoubes66zpo6ciqtbvon5gwp4tm655fekl6ws3ck6epy@png)
@edsonbellido.bsky.social2/4 Scope: joint process and equipment R&D across FEOL, BEOL, and packaging. Targets: higher interconnect density, better power delivery, thermal headroom for agentic AI HPC. Plus new logic materials and Foveros 3D stacking. #Chips #AdvancedPackaging
@mengli512.bsky.socialIs Teradyne stock a sustainable long-term investment, or does the recent revenue guidance drop signal trouble for the company?
#ai #testing #robotics #optical #chip #memory #advancedpackaging $TER $ROK $ZBRA
youtu.be/m7ytk0_1-SU
@edsonbellido.bsky.socialFull capacity arrives by 2029 at about 44,000 wafers per month with 1,600 jobs. For NXP this is automotive and industrial supply security. For the industry, more 300mm capacity where analog flows meet interposer demand. #AutomotiveChips #AdvancedPackaging
@edsonbellido.bsky.socialMemory bandwidth and system in package architectures are evolving rapidly. Projections show 2029 memory benchmarks increasing drastically, with HBM bandwidth scaling 34x and 3D DRAM jumping 115x. #Semiconductors #AdvancedPackaging
@iwpost.bsky.socialThe real loops of innovation#advancedpackaging #Block2 #chipmanufacturing #Connectivity #highbandwidthmemory #semiconductors #Technology
@jissonews.bsky.social10月30日(金)13:00-17:20に、エレクトロニクス実装学会 #JIEP 先進実装・電子部品研究会が公開研究会『インターコネクション技術の最前線』を開催。講演6件。先進パッケージング・ファーストレベル相互接続技術、はんだ付けの最新技術、エリアレーザによるリフロー、AI時代のモールディング技術、ガラス基材への導体層形成、大気圧プラズマ。東京都杉並区・回路会館およびオンラインにて。詳細は jiep.or.jp/tech-comm... に。
#Seminar #AdvancedPackaging #Interconnection
@michel-k-tech.bsky.socialPieceMakers is taking a memory-first route for edge AI, bonding DRAM closer to the processor instead of leaning on HBM-heavy designs.
#tech #technology #edgeai #dram #advancedpackaging #aimemory
@wilayahmy.bsky.socialSpirox Launches High-Speed TGV Crack Inspection System to Support High-Volume Glass Substrate Inspection #Spirox #TGVInspection #GlassTechnology #AdvancedPackaging #AIApplications
@mengli512.bsky.socialAdvanced packaging has become the supply-chain bottleneck for AI compute, and the profit pools are shifting from packagers to the tools and materials they cannot replace.
#Advancedpackaging #AI $TSM $NVDA
chippub.substack.com/p/rethinking...