OpenAI just teamed up with Synopsys to launch GPT‑Synopsys, an AI model that can design chips using EDA tools. Could this be the next leap for semiconductor design? Dive into the details! #OpenAI #Synopsys #ChipDesign
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@aidailypost.comOpenAI just teamed up with Synopsys to launch GPT‑Synopsys, an AI model that can design chips using EDA tools. Could this be the next leap for semiconductor design? Dive into the details! #OpenAI #Synopsys #ChipDesign
@cryptofox.newsOpenAI & Synopsys team up to create GPT-Synopsys! 🤖 collaboration brings AI to chip design, optimizing for power, performance & area using Synopsys's EDA tools. Customer data stays private. Early clients are already on board! #AI #ChipDesign #Synopsys #OpenAI
@edsonbellido.bsky.socialInference token usage has exploded by 500x over the past three years. To support this, new tape-outs have jumped 4x across advanced nodes, while power scaling innovations like A14 Nanoflex deliver a 23% power reduction over N2P. #ChipDesign #AdvancedNodes
@pragyajha03.bsky.socialBig ideas need room to grow! Galgotias University’s participation in India’s semiconductor innovation ecosystem through the Chips to Startup Programme connects students with opportunities in chip design and advanced electronics.
@semiengineering.bsky.socialAI is arriving in EDA at a time when engineers can no longer depend on brute-force scaling for performance & power improvements, and when the gaps created by disconnected point tools are becoming increasingly time-consuming to fill semiengineering.com/edas-future-...
#chipdesign #EDA #semiconductor
@gadgetflux.bsky.socialRISC-V is a game-changer: the open-source architecture accelerating global innovation.
#RISCv #OpenSourceHardware #TechInnovation #ChipDesign #Semiconductors #FutureTech #GadgetFlux #TechNews #Engineering
@spaisee.bsky.socialAI can design chips in weeks. Can validation keep pace, or expose risks too late?
#AI #ChipDesign #Validation https://spaisee.com/article/can-ai-shorten-chip-design-without-creating-a-validation-crisis
@thedailytechfeed.comRicursive is building AI that designs its own hardware—years of development time may soon be weeks. #AI #Hardware #ChipDesign #Ricursive #TechCrunchDisrupt #MachineLearning thedailytechfeed.com/ricursive-ai...
@semiengineering.bsky.socialWhile LLMs can deploy swarms of agents for continuous reasoning and independent action, that’s overkill for most applications.
semiengineering.com/when-ai-agen...
#chipdesign
@spaisee.bsky.socialThe real AI chip race may be validation, not design speed. Can teams prove performance before launch?
#ChipDesign #AI #Engineering https://spaisee.com/article/can-ai-shorten-chip-design-without-creating-a-validation-crisis
@semiengineering.bsky.socialSemiconductor Engineering sat down with 5 industry experts to discuss recent developments and challenges when using agentic AI for chip design
semiengineering.com/multi-agent-...
@wealthwise-dca.bsky.socialCadence launched a new RTL Generation Agent for its ChipStack AI Super Agent, using natural-language prompts to generate, analyze and optimize RTL code for power, performance and area (PPA).
#CDNS #Cadence #AI #ArtificialIntelligence #ChipDesign #Semiconductors
@garrytan-mir-rt.selfhosted.social
@freegardener.bsky.socialAI chip design demos look like breakthroughs—until the real world hits. Performance isn't understanding, and the model isn't the world. #AI #ChipDesign #MachineLearning #TechEthics
https://freegardner.com/synapse/ai-chip-design-demo-vs-real-world-gap.html
@calmnewzvibez.bsky.socialBeyond the Monolith: Multi-Die Assembly and the Architecture of the 2nm Era
Explore how multi-die assemblies and chiplets are replacing monolithic designs at 2nm and below to overcome physical scaling limits and power density challenges
@moschip.comDay 2 is in full swing at Semicon India 2026!
The MosChip Team is showcasing live demos, semiconductor innovations, and advanced chip solutions.
Come experience innovation in action!
Booth H5316
#MosChip #SemiconIndia2026 #Semiconductor #ChipDesign #Innovation #Electronics
@moschip.comSemicon India 2026 | New Delhi 🚀
MosChip is showcasing live demos, advanced semiconductor solutions, and our latest chips at Booth H5316. Experience innovation in action!
đź“ŤYashobhoomi, New Delhi | Booth H5316
#MosChip #SemiconIndia2026 #Semiconductor #ChipDesign #Innovation
The AI boom has created a rush to design new silicon that can accelerate AI inference.Â
These new chips generally target the same problems.
But the strategies upcoming AI inference chips use to solve these problems are incredibly diverse.
OpenAI has internal, fine-tuned LLMs for chip design, and used them to help with Jalapeno, its AI chip.
Hardware VP Richard Ho stressed the goal is to bring improvements to public models. “It’s safe to say that Astra and following models will be very good at chip design."
How did OpenAI design Jalapeño, its first AI inference chip and system?
OpenAI's Richard Ho and Chris Leary spoke on the topic a Hot Chips 2026, but some questions remained—so I interviewed them to get more answers.